Shishunag M is a Staff Engineer at MediaTek, specializing in physical design engineering with a deep understanding of RTL to GDSII concepts. They have significant experience with tools such as ICC2/Innovus and Primetime/Tempus, demonstrating strong analytical and problem-solving skills in the semiconductor industry. Previously, Shishunag worked at Pozibility Technologies Pvt Ltd and SkandySys Private Limited as a Physical Design Engineer. They hold an M.Tech in VLSI design and Embedded Systems from BGS Institution of Technology and a Bachelor of Engineering in Electronics and Communication from Government College of Engineering, Ramnagar.
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