Triet le

Triet Le is a Staff Design Verification Engineer at MediaTek since October 2020, focusing on verifying the latest ARMv9.3-A processors. Prior to this role, Triet served as a Senior Design Verification Engineer, verifying a range of architectures including RISC-V, ARMv8-A, ARMv8.2-A, ARMv9-A, and ARMv9. Triet's earlier experience at Renesas Design Vietnam Co., Ltd. from March 2016 to October 2020 as a Senior Hardware Design Engineer involved designing, synthesizing, and verifying ARM CCI-500 and ARM CoreSight debug, as well as conducting subsystem verification for multiple ARM processor architectures and managing projects. Triet holds a Bachelor of Engineering degree in Mechatronics, Robotics, and Automation Engineering from Bach Khoa University, obtained in March 2016.