Wei-Jhe Chen is a skilled digital IC design and front-end partition integrator with experience in designing link and logical layer IPs for high-speed interfaces. They have held roles as a Senior Digital Design Engineer at Phison Electronics Corps. and a Senior Logic Design Engineer at Parade Technologies, Inc. Currently, Wei-Jhe works at MediaTek, focusing on clock, reset, bus, and low-power designs while managing project integrations. They earned a Bachelor of Science in Electrical and Electronics Engineering from National Taiwan University of Science and Technology and two Master of Science degrees, one from RWTH Aachen University and another from the same institution.
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