Ankush Nehra is an experienced engineer specializing in ASIC design and system-on-chip (SoC) integration. Formerly a Design Engineer at NXP Semiconductors from July 2018 to April 2021, Ankush contributed to reset integration and optimization of iomux cells. Subsequently, as an ASIC RTL Design Engineer at Google from September 2021 to August 2025, Ankush was responsible for the ARM-based DMA subsystem for Google Tensor SoC aimed at upcoming Pixel phones. Currently serving as a Senior Design Engineer at Meta since July 2025, Ankush continues to leverage expertise in the field. Ankush holds a Bachelor of Technology in Electronics and Communications Engineering from Delhi Technological University, completed in 2018.
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