Aswin Gopalan has diverse experience in engineering and management roles, primarily within the semiconductor and technology sectors. Aswin began a career at Society for Electronic Transactions and Security (SETS) as a Research Associate, focusing on cryptology protocols from June 2004 to October 2006. Following this, Aswin served as a Senior Systems Engineer at a wireless semiconductor startup and held various positions, including Scientist and Technical Manager at ABB Corporate Research until February 2013. Subsequent roles at Intel Corporation involved SoC Design and IP Logic Design Engineering between March 2018 and March 2023. Aswin then progressed to Senior Manager of Digital Design Engineering at Analog Devices India from March 2023 to November 2025, and currently holds the position of ASIC Engineering Manager at Meta, launched in December 2025. Throughout this career, Aswin has demonstrated leadership in technical activities related to FPGA design and has contributed significantly to multiple projects, exhibiting expertise in various facets of semiconductor technology and digital design engineering.
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