ChaiYong Lim possesses a robust background in electrical and electronics engineering, highlighted by a Doctor of Philosophy (PhD) from Arizona State University and a Bachelor of Science (BS) from Michigan State University. Professional experience includes an internship as an Analog Designer Intern at IDT - Integrated Device Technology, Inc. and an Analog Design Intern at Texas Instruments' Kilby Lab. ChaiYong Lim progressed to a Senior Engineer role at Qualcomm from June 2018 to July 2021 and is currently serving as an Analog & Mixed Signal Designer at Meta since July 2021.
This person is not in the org chart
This person is not in any teams
This person is not in any offices