Dhara Patel has extensive experience in the semiconductor industry, beginning with a graduate internship at Broadcom in early 2008. Following this, Dhara worked at Intel as a SoC Design Engineer from August 2008 to July 2024. After this tenure, Dhara held the position of Principal Engineer, STA at Samsung Semiconductor from July 2024 to June 2025. Currently, Dhara serves as an ASIC Implementation Engineer-Timing at Meta, starting in June 2025. Dhara's academic background includes a Master's degree in Electrical and Electronics Engineering from the University of Southern California, completed in 2008.
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