Dwaipayan Sil is an experienced engineering professional with a solid background in silicon packaging and technology development. Dwaipayan began a career at Cornell University as a researcher from July 2002 to December 2007, following which there was a tenure at Intel Corporation from February 2008 to May 2013, progressing through multiple roles including Technology Development Process Engineer, Engineering TD Manager, and Silicon Package Architect. In a recent role at Siemens EDA from January 2025 to November 2025, Dwaipayan served as Principal Package Design Engineer/Architect specializing in 3D IC Engineering. Currently, Dwaipayan occupies the position of Silicon Package Engineer at Meta, starting in November 2025. Educational qualifications include a degree from Cornell University attained between 2002 and 2007.
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