Eda Sahin

Eda Sahin has extensive experience in the field of electrical and electronics engineering, beginning with an internship at TAI in 2007, followed by an internship at the University of Rome "La Sapienza" in 2008, focusing on MATLAB coding for EEG signal modeling. From January 2009 to November 2015, Eda worked at Aselsan as a Digital Design Engineer in the Microelectronics, Guidance and Electro-Optics Division, where involvement included the full-cycle development of FPGAs for electro-optical imaging systems. Between March 2016 and June 2017, Eda served as an FPGA Design Engineer at Infinera, later transitioning to Intel Corporation as a Design Verification Engineer from June 2017 to August 2019, where responsibilities encompassed test plan development and test environment setup. Currently, Eda holds the position of ASIC Engineer at Meta since September 2019. Eda earned both a Bachelor of Science and a Master of Science in Electrical & Electronics Engineering from Middle East Technical University.