Jaesik Lee is an experienced engineering professional with a strong background in integrated circuit packaging technologies and process development. Notable roles include positions as a Principal Engineer at GLOBALFOUNDRIES and Oracle, leading 2.5D CoWoS technology development at NVIDIA, and serving as Packaging Technologist at Google, where development focused on server and machine learning products. Currently, Jaesik Lee holds the position of VP Package Engineering at SK Hynix America and Package Development Lead at Meta, overseeing chiplet development. Previous work at Samsung Electronics, Qualcomm, and the Institute of Microelectronics has contributed to extensive expertise in advanced packaging processes and materials, including Through Silicon Via (TSV) integration and ultra-fine pitch Flipchip technology. Jaesik Lee earned a PhD in Mechanical Engineering from the University of Waterloo.
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