Jatinder Singh

Jatinder Singh is an experienced engineer with a strong background in digital design and verification, having worked in various roles across multiple leading technology companies. At Quartics Technologies, Jatinder focused on module level verification of video DSP engines and performance measurement of DDR2 memory. At Qualcomm, responsibilities included defining micro-architecture and implementing RTL for a Motion Vector Prediction block. As a Sr. Design Engineer at Microchip Technology Inc., Jatinder designed digital blocks for RF applications and developed a cortex-M4 based FPGA platform for validating Wireless MAC and PHY layers. Further advancements led to a principal design role where multi-million gate Wireless IP was successfully implemented for IoT SoCs. Prior experience includes an internship at Broadcom and a design engineer role at Conexant Systems, with early education from the Indian Institute of Technology, Madras, and a master's degree from the University of California, San Diego. Currently, Jatinder serves as an ASIC & FPGA Design Engineer at Meta.