Ping Liu

Ping Liu is a seasoned professional in the semiconductor and technology sectors, currently serving as a Silicon Power Architect for AR/VR at Meta since October 2021. Prior experience includes over thirteen years at Intel Corporation as Power Lead, where responsibilities encompassed driving low power methodologies and initiatives for Intel Xeon server products, along with power modeling and reduction for complex system-on-chip (SOC) and intellectual properties (IPs). Earlier in 2008, Ping Liu worked at AMD as a Design Engineer 2, focusing on SRAM transistor level circuit design and related validations. Academic credentials include a Master of Science in Electrical and Computer Engineering from Northeastern University and a Bachelor of Science in Microelectronics from Fudan University.