Rahul Reddy

Rahul Reddy is a skilled software engineer with extensive experience in optimizing and scaling software applications across major technology firms. Notable roles include a position at Xilinx focused on accelerating datacenter workloads in FPGA environments using High-Level Synthesis (HLS), and a tenure at Intel Corporation concentrating on C++ HLS compiler optimization for FPGA applications. At Microsoft, Reddy contributed significantly to scaling and optimizing the Office Build Infrastructure. Currently, at Meta, Reddy is enhancing debugger tooling for Reality-Labs developers. Reddy holds a Bachelor's degree in Electrical, Electronics, and Communications Engineering from Osmania University and a Master's degree in Digital Design and Computer Architecture from the University of Florida.