Richa Rao is a skilled engineer with extensive experience in design verification, research, and automation. Richa held the position of Graduate Research Assistant at the University of Washington from October 2018 to June 2020, focusing on implementing Recurrent Neural Networks in high-level synthesis for FPGAs. Richa also served as a Graduate Teaching Assistant during this time, aiding in VLSI coursework. Current engagement as a Design Verification Engineer at Meta began in April 2024, following a similar role at Intel Corporation from August 2020 to April 2024. Prior experience includes providing IT Quality Assurance services as an Advisory Analyst at Deloitte and internships at CERN and the Defence Research and Development Organisation. Richa earned a Master of Science in Electrical Engineering from the University of Washington and a Bachelor of Engineering in Electrical and Electronics Engineering from Dayananda Sagar Institutions with First Class distinction.
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