Suraj Augustine

Suraj Augustine has a solid background in integrated circuit design and system-on-chip engineering, beginning with experience as a Staff II and Staff I IC Design Engineer at Broadcom from February 2014 to August 2014, where work focused on front-end RTL design for interfaces such as PCIe and various security blocks. Following this, Suraj held roles at Qualcomm as a Senior Lead Engineer and subsequently at Intel Tech India Private Limited from February 2018 to September 2024, where responsibilities included leading subsystem RTL design for PCIe in graphics chips. Currently, Suraj is an ASIC Design Engineer at Meta, starting in September 2024. Educational qualifications include a BTech in Applied Electronics and Instrumentation from the College of Engineering, Trivandrum, and an MTech in Electronic Design from the Indian Institute of Science.