Suresh Vemula is an accomplished engineer with extensive experience in the technology sector, particularly in hardware and ASIC engineering. Suresh began a career as a Design Engineer at Microchip Technology from July 2007 to November 2009 and progressed through various roles, including Member of Technical Staff at Mirafra Technologies and Hardware Engineer at Cisco. Suresh held the position of Senior Principal Engineer at Fungible, Inc. from April 2017 to February 2023 and then transitioned to Microsoft in a similar role until April 2025. Currently, Suresh serves as an ASIC Engineer at Meta, having joined in May 2025. Suresh holds a Bachelor of Engineering (Hons) in Electronics from the Birla Institute of Technology and Science, earned in 2007.
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