Venkateswarlu Muvva

Venkateswarlu Muvva is an experienced engineer with a focus on silicon prototyping and emulation, currently serving as an E2E Silicon Prototyping FPGA and Emulation Engineer at Meta since July 2019. Prior to this role, Venkateswarlu held positions including Design Verification Lead at Samsung SARC | ACL from 2016 to 2019 and Senior Staff Design Verification Engineer at Intel from 2010 to 2016. Earlier in the career, Venkateswarlu worked as a Senior Verification Consultant and ASIC Director at Imagination Technologies (2006-2010) and as a Senior ASIC Consultant at TTM Inc. (2003-2006). Venkateswarlu holds a Master’s Degree in Electrical and Electronics Engineering from the University of California, Santa Cruz, as well as a Bachelor’s Degree in Electrical and Electronics Engineering from Acharya Nagarjuna University, with additional education from UC Berkeley College of Engineering and Osmania University.