Yash Vardhan

Silicon Design Engineer

Yash Vardhan is a Silicon Design Engineer at Meta, contributing to the MTIA project since July 2025. Prior to this role, Yash served as a Staff Hardware Engineer at Untether AI from January 2022 to July 2025, leading the layout design of high-density POD macros and introducing innovative design methodologies. As a Senior Hardware Engineer at Untether AI, Yash played a crucial role in developing the second generation Untether chip, SpeedAI240, achieving significant advancements in power efficiency. Earlier experience includes working as a Microelectronics Engineer at Dolphin Semiconductor, focusing on mask layout design and IC solutions, and serving as a Teaching Assistant at the University of Toronto, where Yash managed course logistics for project management courses. Yash holds a Master of Engineering in Electrical and Electronics Engineering from the University of Toronto and a Bachelor of Technology in Electrical, Electronics, and Communications Engineering from SRM IST Chennai.

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