ZEYU BU

Zeyu Bu has extensive experience in design verification, with a background at leading technology companies. At Intel Corporation, Zeyu held roles as an IP Design Verification Engineer and SoC Design Verification Engineer, focusing on Power Management verification and developing Bus Functional Models to enhance simulation speed. Prior experience includes an engineering internship at Qualcomm, where Zeyu analyzed power in analog and digital circuits and designed high-speed interface circuits. Currently, Zeyu is employed as a Design Verification Engineer at Apple and also holds a position at Meta. Zeyu completed a Bachelor of Science in Electrical and Electronics Engineering at Shanghai Jiao Tong University and a Master of Science in VLSI at the University of Michigan, achieving high academic honors.