Anoop Narayanan

Anoop Narayanan is a skilled VLSI Design Engineer with over 16 years of experience in ASIC design flow, currently serving as a Principal Engineer at Microchip Technology Inc. Anoop has held various roles, including SOC Full Chip Timing Lead at Intel Corporation, where they focused on timing analysis and closure, noise analysis, and formal verification. Anoop's expertise encompasses multiple design methodologies and complete gate level verification of Silicon on Chips. They earned a Master of Science from Birla Institute of Science & Technology and a Bachelor of Technology from College of Engineering, Chengannur.