Avtar Singh is a Principal Engineer-CAD at Microchip Technology Inc., specializing in RTL2GDS methodology activities since January 2023. Previous experience includes roles as a Physical Design CAD Engineer at Kandou S.A., focusing on Synthesis/PnR/STA/EMIR methodologies, and as an EMIR/Power Integrity Engineer at Cadence Design Systems, supporting key clients in power analysis and tool evaluations. Avtar has also held positions at Intel Corporation and Qualcomm, where responsibilities included RTL2GDS implementation and timing closure of SoC designs. Education was completed at the National Institute of Technology Kurukshetra with a B.Tech in Electronics & Communication. Proficient in various design tools, Avtar brings extensive expertise in the semiconductor industry.
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