Chaitanya Kumar is a Senior Design Verification Engineer at Microchip Technology Inc., with over six years of experience in ASIC/IP design and verification. They possess expertise in digital design verification using SystemVerilog and UVM verification techniques, and are skilled in developing scalable verification methodologies and debugging complex ASIC designs. Chaitanya has previously worked at Incise Infotech Private Limited and NXP Semiconductors, and they hold a Master of Technology in VLSI Design from Vignan's Foundation for Science, Technology & Research.
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