Deepali U

Deepali U is a Senior Engineer 1 in Analog Layout at Microchip Technology Inc., with over five years of experience in VLSI AMS layout. Deepali previously served as an Analog Design Engineer at Altran, where they honed skills in designing layouts for analog blocks across various technologies, including 7nm, 10nm, and 14nm. Deepali holds a Bachelor of Technology in Electrical, Electronics, and Communications Engineering from Haldia Institute of Technology and completed an advanced diploma in ASIC design from RV-VLSI VLSI and Embedded Systems Design Center. They possess expertise in floor planning, placement, routing, and physical verification checks, specifically working with tools such as Genesys and Virtuoso Layout.