James Kim

James (Jae Hyeong) Kim is a seasoned engineer with extensive experience in analog and digital design, specializing in memory technologies. Currently serving as a Senior Analog/Digital Design Engineer at Microchip Technology Inc. since August 2019, James focuses on FPGA memory block design, SoC compiler SRAM design, and high-speed/low-power digital designs using System Verilog. Prior to this role, James held key positions such as Senior Member of the Technical Staff at a start-up, where contributions included NAND flash data path design, and at SK hynix America Inc. with a focus on DDR/SDR timing for clock paths. James's earlier career includes significant contributions at GSI Technology, Contour Semiconductor, and Sony Electronics, focusing on SRAM design, Phase Change Memory, and high-speed I/O interfaces. Academically, James holds both a Master’s and Bachelor’s degree in Electrical Engineering and Semiconductor Electronics from Korea University.