Jasmeet Singh is an experienced engineering professional currently serving as Design Engineering Manager at Microchip Technology Inc. since February 2022. Previously, Jasmeet held the position of Chip Lead for HPC SoCs at AMD from October 2019 to February 2022, and prior to that, worked as Digital Design Manager at STMicroelectronics from January 2018 to October 2019. Jasmeet's career includes roles as Senior Staff Program Manager at Seagate Technology, Member of Technical Staff/Senior Design Engineer at STMicroelectronics, and Senior Design Engineer positions at Silicon Labs and Infineon Technologies. Educational qualifications include a Master of Science in Communications Engineering from the National University of Singapore and a Bachelor of Engineering in Electronics from Nanyang Technological University Singapore.
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