Marc Chagnon is an experienced System and FPGA Architect currently working as a Technical Staff Engineer-Design at Microchip Technology Inc. Since 2022, they have utilized their extensive background in FPGA and hardware design, which includes previous roles as a Sr FPGA Designer at Accedian Networks and Sr Hardware Designer at Miranda Technologies. Marc also served as a Group Leader in Hardware Development at CAE and held the position of Sr ASIC Designer at Hyperchip. Their career began at Memotec as a Software Designer, and they later advanced to a Sr FPGA Architect role at Siama Systems Inc. from 2013 to 2022.
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