Nilesh P.

Nilesh P. is a seasoned WiFi BBP ASIC/FPGA Design and Verification Engineer with extensive hands-on experience in ASIC and FPGA design, implementation, and validation. Nilesh previously held leadership roles at Conexant as a Project Lead and Quartics Technology India Pvt Ltd as a Verification Lead. Nilesh also served as a Principal Engineer at QLogic before becoming a Staff Design Engineer at Microchip Technology, where they continue to excel in design and verification tasks. Their expertise encompasses functional simulations, test-plan development, and proficiency in Verilog, VHDL, and SystemVerilog, with a focus on standards such as 802.11 and H.264.