Rajesh T is an experienced engineer currently working as Engineer II in AMS Verification at Microchip Technology Inc. since July 2023, focusing on mixed signal, analog, and digital block simulations utilizing tools like Symphony, Primesim, and Questasim. Previously, Rajesh served as a Graduate Technical Intern at Intel Corporation from September 2022 to May 2023, specializing in RTL design, CDC concepts, and debugging, with hands-on experience using the Synopsys SpyGlass CDC GUI tool. Rajesh holds an Intermediate degree from Narayana Junior College with a score of 97.6, a Bachelor of Technology in Electronics and Communications Engineering from Gokaraju Rangaraju Institute of Engineering and Technology with a CGPA of 8.79, and a Master of Technology in VLSI from Vellore Institute of Technology, achieving a CGPA of 8.04.
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