Satish M is a Manager at Microchip Technology Inc., specializing in test development for both analog and digital systems. With extensive experience in ATE, Satish has worked on post-silicon validation, functional test pattern generation, and fault coverage simulation. Satish has previously held positions at Cranes Software International Ltd, Tata Elxsi, and Microsemi Corporation. They earned a B.Tech from Jawaharlal Nehru Technological University and an M.Tech from RMIT University, and have received multiple awards for their contributions to successful chip productions and project completions.
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