Te Cheng Tseng is a principal engineer at Microchip Technology Inc., specializing in wireless digital SoC integration and RTL design. With over nine years of experience in RTL programming and digital design, Te Cheng has developed expertise across various applications including network storage and high-speed interfaces. Te Cheng's previous roles include serving as a staff engineer at SMART Modular Technologies and an FPGA engineer at ADLINK Technology, where they led technical projects and collaborated cross-functionally. They hold a Bachelor's degree in Biomedical/Medical Engineering from Chung Yuan Christian University and a Master's degree in Electrical and Electronics Engineering from Chang Gung University.
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