Xiaoye Xia

Xiaoye Xia is currently an MTS Silicon Design Engineer at AMD, where they leverage their expertise in Design-For-Test (DFT) and ATPG. With significant experience in DFT methodology, they previously held roles at Microchip Technology Inc. and PMC-Sierra. Xiaoye has a strong educational background, holding multiple degrees, including a Master's in Electrical Engineering from the University of Saskatchewan and a Master’s in Control System from Northwestern Polytechnical University. Their skills encompass IEEE standards and test vector generation, showcasing a commitment to enhancing design flows and teamwork in engineering environments.