Jatinder Verma

Jatinder Verma is a Principal Engineer at Micron Technology with over 20 years of experience in ASIC design and verification, utilizing Vera, System Verilog, and UVM. Jatinder has built and led teams to establish a center of excellence in Front End Design and Verification for IP Development and SoCs. They have a strong focus on enhancing product methodologies and ensuring execution excellence while validating products against industry benchmarks. Jatinder has also worked globally with diverse teams and leaders, specializing in various connectivity protocols and hardware acceleration techniques.