Roopak Vasa

Roopak Vasa is a Principal Engineer in Memory Circuit Design Verification at Micron Technology as of 2024. Previously, Roopak held various engineering roles, including Sr. Engineer at INVECAS, where work focused on Pseudo Dual Port SRAM in 22FDX GF technology, and Memory Design Engineer positions at STMicroelectronics and Synopsys, contributing to SRAM and ROM Embedded Memory Compilers. Roopak earned a B.E. in Electronics and Communication from G. H. Patel College of Engineering and Technology and an M.Tech. in VLSI Design from the Institute of Technology, Nirma University.