S.W. Lin is a Senior Manager in Advanced Package Technology Development at 美光科技有限公司, where they focus on the next generation of DRAM HBM4e/5 process and Wafer Level Technology Bumping development since 2025. Previously, they served as the TD DRAM Process Integration Lead at 美光科技 from 2021 to 2025, leading process integration teams and championing models of record. Lin's earlier experience includes roles as a Project Manager at 旺宏電子, where they contributed to NAND flash process integration, and as a Senior Member of Technical Staff at GLOBALFOUNDRIES, focusing on embedded flash process integration. They also worked at 英特爾 from 2018 to 2021 as a Process Integrated Yield Staff Technologist, specializing in 3D NAND process integration and yield enhancement.
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