Sandeep Kadasani

Sandeep Kadasani is a Principal Lead Engineer specializing in the development and design of quality and reliability for Cell and CMOS technologies. With a solid foundation in CMOS device physics, circuit design, and fabrication processes, Sandeep possesses extensive experience in process characterization, plasma physics, and defect management. They have previously worked at notable companies such as Micron Technology, where Sandeep held the roles of Product Reliability Engineer and Senior Product Reliability Engineer, and they have also gained valuable experience as an intern at ON Semiconductor and Lam Research. Sandeep holds a Master’s degree in VLSI from Boise State University and a Bachelor’s degree in Electrical and Electronics Engineering from SRM University.