Satish Ganta

Satish Ganta is a Staff Engineer currently working at Micron Technology, specializing in High Bandwidth Memory (HBM) and DRAM. With prior experience as a Senior Design Engineer at Western Digital, Satish contributed to the Memory CORE Team, focusing on ROW and COLUMN circuit designs for memory arrays. They hold a Master of Technology in Communication Systems from the National Institute of Technology, Tiruchirappalli, and a Bachelor of Technology in Electronics and Communications Engineering with distinction from RGUKT - Nuzvid. Satish has a solid background in full custom CMOS design, digital design, and design verification across various projects.