Vinod Patil

Vinod Patil is a skilled Physical Design Engineer with extensive experience in ASIC design, specializing in block-level SoC/IP designs, synthesis, static timing analysis, and physical design. Currently a Staff Physical Design Engineer at Micron Technology since 2025, Vinod previously held roles as a Senior Design Engineer at DIGICOMM Semiconductor and as a Physical Design Engineer at NXP Semiconductors. Vinod's academic credentials include a Master of Technology from Vellore Institute of Technology, where they built a strong foundation in engineering principles. With a history of working in various tech companies, Vinod is proficient in using Cadence and Synopsys tools, as well as scripting and hardware languages.