Ashwin Hanchinal is a Senior SoC RTL Design Engineer at Microsoft, where they leverage their expertise in design for debug and ARM CoreSight debug and trace. Previously, Ashwin held several roles at Intel Corporation from 2018 to 2020, earning multiple awards for outstanding RTL execution and innovative problem-solving. They began their career as a Developer at Infosys from 2007 to 2009, receiving recognition for their initiative and communication skills. Ashwin holds a Master of Science in Electrical Engineering (VLSI) from the University of Southern California and a Bachelor's degree in Electronics and Communication from Visvesvaraya Technological University.
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