Prashanth M

Prashanth M is a Senior Design Verification Engineer and Tech Lead currently at Microsoft, with a strong focus on mobile and server hardware architectures and design verification. They previously held roles at Qualcomm as a Design Verification Engineer and at Cisco as an RTL Design Engineer, contributing to the design of programmable memory architecture for routers and switches. Prashanth has also worked as a Field-Programmable Gate Arrays Engineer at Ultra Lab and as a Course Grader for the Department of Electrical Engineering at the University of Southern California. Prashanth holds a Master of Science in VLSI and Computer Architecture from the University of Southern California and a Bachelor of Technology in Electronics and Communication Engineering from Pondicherry University, where they were a gold medalist.