HP

Hailey P.

Sr. Layout Engineer

Hailey P. is currently working as a Senior Layout Engineer at Monolithic Power Systems, Inc. Hailey has previous experience as an IC Mask Layout Designer at Analog Bits. Hailey also worked as a Teaching Assistant at Silicon Drafting Institute and was a Student/Lab at the same institute where Hailey completed school projects related to BiCMOS mixed-signal transceiver circuits. Hailey received a certification in Advanced BiCMOS IC Mask Layout Design from Silicon Drafting Institute.

Location

San Jose, United States

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