Min Chen

Min Chen has over nine years of professional experience in digital design, ASIC engineering, and logic design. In 2021, Min began working as a Manager of Digital Design for Meerline Intelligent Technology (Beijing) Co. Ltd. Prior to that, Min worked as a Digital Design Engineer for Iluvatar from 2018-2021. From 2015-2018, Min was a Logic Design Lead and SMTS at GLOBALFOUNDRIES, where they were responsible for timing fixes, new feature development, problem analysis, and RTL maintenance. Before that, Min was an ASIC Engineer at Qualcomm from 2012-2015, where they worked on IEEE 802.

Min Chen obtained a Bachelor's degree in Communication Engineering from Zhejiang University in 2009, followed by a Master's degree in Information & Communication Engineering from the same university in 2012.