Pardeep Kumar

Pardeep Kumar is an experienced verification engineer with over 9 years of expertise in ASIC verification, focusing on SOC, IP, and subsystems. They have hands-on experience with ARM processors, GPUs, and memory controllers, utilizing SystemVerilog (SV) and Universal Verification Methodology (UVM) for functional verification and GLS simulations. Pardeep has held positions at companies such as Sankalp Semiconductor, Chelsio Communications, and MosChip, where they currently serve as an Associate Principal Engineer. They earned a Master’s Degree in VLSI Design from Deenbandhu Chhotu Ram University of Science and Technology in 2016.