AR

Andrzej Radecki

ASIC Development Engineer; Analogue IC Design Manager

Andrzej Radecki is an experienced engineer specializing in analogue and mixed-signal integrated circuit design, with a strong background in high-speed transceiver design. At Nokia, Andrzej held positions as an ASIC Development Engineer and Analogue IC Design Manager. Previously, at Huawei Technologies, Andrzej served as an Expert in High-Speed Analogue/Mixed-Signal IC Design and was Deputy Director of the Data Converter Group. Earlier roles include Principal Design Engineer for High-Speed Transceiver Design at Fujitsu Semiconductor Europe and Design Engineer in Analogue/Mixed-Signal IC Design at Fujitsu Microelectronics Europe. Additionally, Andrzej worked as a Hardware LSI Engineer focused on Analogue IC Design at Geosys Inc.

Links

Previous companies


Org chart


Teams

This person is not in any teams


Offices

This person is not in any offices