Vincent Cheung is an accomplished engineer specializing in analog integrated circuit design, with extensive experience in various roles within the semiconductor industry. At Normal Computing, Vincent serves as a Staff Analog Design Engineer. Previously, Vincent was the ASIC Analog Design Lead and Founding Engineer at Radical Semiconductor and held multiple positions, including Staff Analog IC Design Engineer, Senior IC Design Engineer, and IC Design Engineer at Wispry. Vincent earned a Master of Science in Mixed-signal Analog IC Design from UC Irvine in 2013, following a Bachelor of Science in Electrical Engineering from the same institution in 2012.
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