Vlad Bâra

Vlad Bâra is a Senior Design Verification Engineer with over 20 years of experience in functional and formal verification across multiple levels, including block, sub-chip, and system verification. They have worked with industry-leading clients such as Intel, Broadcom, and Marvell, utilizing languages such as Specman and SystemVerilog/UVM. Vlad's career includes significant roles in various companies, including a Verification Team Lead position at The Six Semiconductor, and they currently operate as an independent contractor. They hold a Master’s degree in Mechatronics, Robotics, and Automation Engineering from the University POLITEHNICA of Bucharest.