Abilash Sekar

Abilash Sekar is a Senior Design Engineer at NVIDIA, where they have been involved in the complete project cycle of ARM 64-bit CPU design since 2011, including responsibilities in architecture and functional verification for the Level 1 Data Cache and TLB, L2 Cache design, and System Coherency Fabric. Previously, they held software engineering roles at Freescale Semiconductors and Hewlett-Packard, focusing on 3G UMTS protocol and HP-UX device drivers. Abilash also contributed as a Graduate Research Assistant and Teaching Assistant at Georgia Institute of Technology, earning an M.S. in Electrical and Computer Engineering there in 2008, after completing a B.E. in Electronics and Communication Engineering at Visvesvaraya Technological University in 2005.