Aditya Mittal is a Senior ASIC Engineer at Nvidia, where they lead unit design for the Power Management Controller in the Tegra Automotive Chip. Previously, they served as an ASIC Engineer at Nvidia, focusing on RTL design and post-silicon testing for the Tegra SoC. Aditya began their career with a summer internship at Bit Mapper Integration Technologies, contributing to the design of an FMCW Sensor, and has also gained experience in education as a Junior Instructor teaching web development. They hold a Bachelor of Technology in Electrical Engineering from the Indian Institute of Technology, Bombay, and participated in a semester exchange at Kungliga Tekniska högskolan.
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