Avinash Rath

Avinash Rath is a Senior Manager in Hardware Engineering with extensive experience in logic design and verification of DFT structures, particularly for embedded SRAMs. Previously, Avinash worked at NVIDIA, where they contributed to the development and verification of MBIST and improved DFT methodologies. They also served as an R&D Engineer at IBM, focusing on fault detection in SRAM memories. Avinash holds a Master's degree in Electrical and Electronics Engineering from Stanford University and a Bachelor's degree from Sri Jayachamarajendra College of Engineering.