Dwip Bhavsar

Dwip Bhavsar has extensive experience in the field of hardware design verification, primarily at NVIDIA from May 2019 to April 2024, where Dwip led the Unit DV team focused on end-to-end front end verification. Prior roles include serving as a Senior ASIC Engineer, handling unit level verification from test planning to sign-off, and as an ASIC Engineer responsible for unit level verification of complex graphics pipeline modules using Verilog and C/C++. Additionally, Dwip Bhavsar gained experience as a Hardware DV Manager intern at Analog Devices, working on the verification of next-generation DSP Processor modules. Educational qualifications include a Master’s degree in Microelectronics (VLSI) from BITS Pilani and a Bachelor of Technology in Electronics and Communications Engineering from Nirma University.