HP

Harsh Pandya

Senior Asic Verification Engineer

Harsh Pandya is a Senior Verification Engineer at Nvidia, utilizing over 7 years of experience in IP/SOC verification. Harsh began his career as an ASIC Design Verification Trainee Engineer at eiTRA in 2018, later advancing to roles at eInfochips as a Senior ASIC Design Verification Engineer and ASIC Design Verification Engineer. Harsh currently holds a position at Nvidia as a Senior ASIC Verification Engineer, after contributing as an ASIC Verification Engineer since 2022. Harsh completed a Bachelor of Engineering in Electronics and Communications Engineering at Marwadi Education Foundations Group of Institutions in 2018, following a Diploma in Electronics and Communications Engineering from Government Polytechnic Rajkot.

Location

Bengaluru, India

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